As the prevalence of semiconductor use continues to increase, aging is a major issue. Semiconductor aging can contribute to significant malfunction as its electrical properties change.

Aging refers to the slow loss of electrical characteristics of a semiconductor device as a result of continuous use or prolonged exposure to various environmental conditions including temperature, moisture, irradiation, and electrical stress.

Impacts of semiconductor aging include:

With these impacts in mind, it is vital to test semiconductor aging throughout its lifetime to gage device durability, performance, and reliability. Traditional procedures used to evaluate aging include Time-Dependent Dielectric Breakdown (TDDB), Hot Carrier Injection (HCI), Bias Temperature Instability (BTI), and Electro-migration (EM).

TDDB can be applied in the form of constant voltage stress (CVS) or constant current stress. For CVS, a voltage — which is often lower than the breakdown voltage of the oxide — is applied while its leakage current is being monitored. The time it takes the oxide to break under the constant applied voltage is called time-to-failure. The test is repeated several times to get a distribution of time-to-failure numbers, which are used to create reliability plots and predict its behavior at other voltages.

HCI happens when an electron or “hole” gains sufficient kinetic energy to overcome a potential barrier necessary to break an interface state. The term “hot” refers to the effective temperature used to model carrier density. When a high voltage is applied to the device, it produces hot carriers which are injected into the devices channel area. The voltage can be permanently changed. This identifies any degradation in the operating frequency of integrated circuit. Eventually, the built-up electric charge within the dielectric layer increases the voltage needed to turn the transistor on. As threshold voltage increases, the transistor progressively switches more slowly.

BTI traps charge in the dielectric but doesn’t require any current to flow between the source and drain. The procedure is done by supplying a bias voltage to the device and exposing it to varying temperatures. It can cause a buildup of charge in the dielectric, along with other problems. Once the gate voltage is removed, however, some problems spontaneously disappear. The recovery occurs extremely quickly — within a few tens of microseconds. When measuring the transistor, effects can only be seen after stress is removed.

EM damages the copper or aluminum connections that link transistors together or to the outside world. It tests the movement of metal atoms in the interconnects. It measures current stress to a device’s metallic lines and determines the time required for metal atoms to move, resulting in interconnect failure which can cause the metal to bulge out of its designated track.

Aging is traditionally determined by testing the substrate current, however, this can be affected by various noises, degrading test accuracy. Outside of traditional testing for semiconductor aging, research published in Microelectronics Reliability has presented a high-efficiency aging test technique that estimates voltage stress based on the median deterioration of device electrical indicators rather than the substrate current, reducing test time while increasing accuracy. Data produced from the test are discrete electrical index values which need to be fitted to the processed data to develop a deterioration formula. Additionally, the validity of the testing is directly impacted by the accuracy of curve fitting.

Regardless of which testing model is used to test semiconductor aging, doing so reduces expenses associated with equipment damage. Additionally, early deterioration diagnosis enables preventative maintenance, reducing repair and replacement expenses.