Protecting Circuits against Electromagnetic Threats

March 1, 1998

9 Min Read
Protecting Circuits against Electromagnetic Threats

Medical Device & Diagnostic Industry Magazine
MDDI Article Index

An MD&DI  March 1998 Column

EMI FIELD NOTES

Case shielding, circuit filtering, and cable protection are keys to meeting new electromagnetic compatibility requirements.

Designers of medical electronic equipment face new challenges as they implement requirements that will center on EN 60601-1-2, which becomes mandatory in July 1998. Manufacturers have become increasingly concerned about how to design sensitive devices with immunity to transient and steady-state radio-frequency (RF) interference. Emission issues are also a major concern, especially with the use of higher-speed clock circuits. Sensitive analog circuits coupled with restrictive leakage current and special external surface treatments for the case have resulted in numerous analog instrument amplifiers and comparator circuits being shut down in the presence of radiated field levels of less than 1 V/m.

Electrostatic discharge test (IEC 801-2: 1991) being performed according to the requirements of EN 60601-1-2.

Patient interface leakage requirements also make the typical electromagnetic compatibility (EMC) design techniques of signal cable decoupling and cable shielding unsuitable for medical devices. This problem sparked the development of effective hardening methods. The key often lies in the printed circuit board (PCB) layout and internal interconnect choices. Thinking about transmission line and high-frequency impedance control methods, even when designing low-frequency analog circuits, can result in effective EMC solutions.

ESTIMATING PROTECTION

Knowing the amount of protection—such as case and cable shielding and circuit filtering—given circuits will need to meet the new requirements is critical. The following steps show how a quick approximation can be calculated.

  • Start with the RF threat level in volts per meter (e.g., 3 V/m).

  • Multiply by the field uniformity expected: 2x for full-ferrite-lined rooms and 4x for semianechoic rooms. (For this example, assume a full-ferrite-tile room, or 2x, yielding a 6-V/m field.)

  • Convert field to decibels (6 V/m = 136 dBµV/m).

  • Subtract the basic tuned dipole loss factor for coupling between two tuned dipole antennas, or —14 dB.

  • Reduce ideal loss further if frequency coupling is below the resonant length of the cable, PCB trace, or equipment dimensions (—20 log10 f3/f 0, where f 3 is the quarterwave frequency of the length of cable, PCB trace, or equipment dimensions). For a 36-in. cable, the quarterwave resonance frequency is 83.3 MHz. If f 0 is 26 MHz, then the correction is —10 dB.

  • Sum up the decibel values as follows: 136 — 14 — 10 = 112 dBµV across a load impedance of 100omega.gif.

  • Convert 112 dBµV to linear units, which yields an induced voltage of 400 mV. As the load impedance increases, so will the induced voltage. For a 100,000-omega.gif load, the voltage will increase to approximately one-third of the 6-V/m level, or 2 V.

  • Compare 0.4- to 2-V induced levels with typical circuit threshold values for "in-band" threat frequencies. Assuming in this example that 26 MHz is within the amplifier's effective bandwidth, then a circuit threshold value of, say, 5 mV can be compared directly to the threat values to yield the needed protection level. In this case, the needed protection varies from 20 log10 0.4/0.005 to 20 log10 2/0.005, or 38 to 52 dB, depending on load impedance.

This is only an approximation, and more rigorous analysis is recommended. The induced voltage range for this example varied from a factor of 1/150 to 1/80, depending on load impedance, and represents an estimate of the amount of induced voltage across the load impedance. Comparing the analog threshold value to this value will give an estimate of the amount of protection necessary. The needed protection can consist of: cable shield protection over the frequency range of the threat, cable shield termination protection, I/O LC low-pass lead filtering at port-of-case entry, I/O common mode (CM) choke filter (external or internal), differential line drivers and receivers, and optic isolators.

CIRCUIT RESPONSE

The amplifier response to a 26-MHz threat at first seems unreasonable, considering a typical instrumentation bandwidth capability. Internal IC protection diodes have the ability to dc-rectify the out-of-band RF-induced signal and cause the amplifier to be dc-biased into a saturated state. Another possibility is for the nonlinear action of the diodes to block the RF interference but allow the modulation on the carrier (required to be 1 kHz) to be induced along with the true intended signal.

Methods for hardening analog circuits are as follows:

  • Treat All Circuits as RF Circuits. Regardless of operational frequency, all circuits need to be treated as high-frequency circuits to properly harden them against high-frequency threats. Shielding cables and terminating them at only one end while protecting the circuit against low-frequency ground loop currents exposes them to RF-field-induced voltages at the quarterwave resonant length of the cable and all higher frequencies. It is essential to design the RF protection to work over the entire RF band of the test requirement, which is now 150 kHz to 1 GHz.

  • Ground Shields at Only One End. At high frequencies, the threat is almost always CM or pin-to-earth (or -case) and not pin-to-pin. Therefore it is the pin-to-earth loops that need to be controlled. At high frequencies, the external E-fields couple RF currents onto the shielded cable. Current and voltage maximums develop at the quarterwave frequencies of the cable length. At cable resonant frequencies and above, the cable shield becomes ineffective.

  • Ground Shields at Both Ends. If the cable shield is grounded at both ends, its major threat will occur at its half-wavelength frequency of 150 MHz. If the shield termination is not coaxial but relies on drain wire terminations, the shield protection will virtually disappear at odd multiples of the resonant frequency. Single-drain-wire shield terminations mean that the half-wave current maximal will flow only through the drain wire, generating intense magnetic fields around the drain wire.

  • Terminate Coaxial Shields. Only by giving the shield current more than one path to ground can the magnetic fields begin to cancel each other and therefore protect the signal pins in the connector. All connectors should be metallic and bonded to the case via direct metal-to-metal contact (conductivity-finished surfaces on both the connector and the case). Shielded backshells should be employed such as those readily available for most sub-D connectors. The "dimpled" type sub-D that is tin plated should be used rather than the DIN and mini-DIN connectors.

  • Segregate Unshielded and Shielded Leads into Different Connectors. All signal circuit pins that are going to employ filtering to harden the I/O circuits should be located in the same connector. All pins in that connector should be filtered. The size of the capacitors should not vary by more than 10-to-1 in value. Shielded and unshielded leads should not use the same connector. All shielded leads should be grouped together so they can use a standard method of termination. Multishielded cables should have their shields shorted together via a conductive metal band or should employ a special connector backshell that allows each shield to ground to the case of the connector.

FILTER CAPACITANCE VALUES

If signal leads employ line-to-chassis capacitive filtering, then the amount of capacitance will be limited by the allowed leakage current. LC filters where the CM inductance is large will allow the pin-to-case capacitance to be small and still achieve the low pass filter insertion loss values needed to protect most circuits.

  • Use Twisted Shielded Cable for Low-Frequency Analog Circuits. Often, analog designers stipulate that shielded signal cables must have the shield grounded at only one end. This is to prevent the serious threat of ground loop current from flowing on the shield and inducing a net voltage across the load impedance. Added twisting significantly reduces "ground loop" magnetic field coupling. Therefore, to harden sensitive analog signals, TSP cable twisted at 18 lays per foot should be used, and both ends of the shield should be grounded.

  • Route Internal I/O Signals in the PCB and Not via Leads. Routing of the internal leads from the connector should be via traces in the PCB. These traces should be connected directly to the I/O connector pins. In this way, the signal traces can achieve maximum CM (pin-to-chassis) impedance control to reduce coupling from high-frequency threats.

PCB DESIGNS

The PCB design should provide for a full ground and power plane just like digital boards, and the mother or backplane board should ground all return planes together. In turn, these planes should be capacitively grounded to the chassis with capacitive values selected according to the amount of case leakage permitted. The key to grounding is that the ground path must have minimum inductance. If dc grounding is employed, the power supply should float power return reference from its chassis, providing one chassis connection reference for the system, namely at the mother or backplane board.

TRANSIENT THREATS

Electrostatic discharge (ESD) and electrical fast transients (EFTs) are generally more of a threat to digital circuits than to analog circuits. An ESD event generates significant amounts of RF radiated energy between 5 and 200 MHz. This energy often peaks at the quarterwave resonant frequency of the person performing the test. Most human bodies self-resonate at between 35 and 45 MHz. Therefore, the peak radiated emissions from ESD also peak in this same frequency range. I/O cables are often resonant in this range as well, and as a result receive significant amounts of the radiated ESD energy.

Measured induced voltage levels across I/O cable termination loads show 600-V levels induced when the case is exposed to a 4- to 8-kV discharge. Such levels are well beyond the typical digital upset threshold value of 0.4 V. The typical induced pulse duration times are around 400 nanoseconds. Shielding the I/O cables and grounding at both ends with no internal signal lead exposure will reduce the levels 60 to 70 dB, yielding 0.3 V or less across the load.

EFTs also generate considerable radiated emissions that couple to cables and case circuitry. The power supply EMC power-line filter provides the main protection to these transients. The CM line ground capacitors are normally the main devices used to shunt the transient currents to chassis and away from the internal circuitry. When this capacitance is limited by leakage current limits, the CM choke must provide more protection. This usually demands a special center tap CM choke, where the center tap is shunted to chassis via a capacitor that complies with the leakage current limits. Typical inductance values are 15—20 mH wound on a high-permeability ferrite core (typically 7000—10,000 µm).

CONCLUSION

The best approach to achieving EMC is to treat all analog and digital circuits as high-frequency responsive and to use high-frequency design methods for cable shielding, PCB layout, and CM filtering. It is important to use full ground and power planes, even for analog circuits, to limit high-frequency CM loops. Most transient threats are high frequency and cause significant radiated energy to be present. It is often this radiated energy that couples via I/O cables into a given piece of equipment. Often this energy comes in on analog leads, recouples to high-speed digital circuits, and causes them to respond adversely. By filtering all analog and digital leads, proper protection can be achieved.

Chris M. Kendall is principal consultant and CEO at CKC Laboratories, Inc. (Mariposa, CA).

Copyright ©1998 Medical Device & Diagnostic Industry

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